CASCODE-LABS

Cascode-labs is developing an open source automation kernel for the design of analog, mixed signal, and RF IC designs. Our projects are designed to work with both other open-source design tools and proprietary design tools.

Goals

• Accelerate designer productivity improvements
• Lower the barrier to entry into IC design
• Encourage collaboration among designers with an interest in design automation
• Lower the barrier to entry for analog and RF design engineers with basic coding skills
• Develop analog and RF IC generators that can produce IP in multiple processes and adjust to variations in specifications.

Projects

• Viper IC design Environment
• Viper-forge community-led IC design packages
• Virtue Cadence Virtuoso SKILL and Python framework for easily integrating automated design projects into Virtuoso.
• Data-panels: Export data reports from simulation results to pptx slides
• Morpheus: Generate Maestro circuit test benches in Cadence Virtuoso